The invention relates to an electronic circuit for providing a desired common mode voltage to a differential output of an amplifier stage, which differential output comprises a first output terminal and a second output terminal, comprising a supply terminal; a first field effect transistor with a source coupled to the supply terminal; a second field effect transistor with a source coupled to the supply terminal; a third field effect transistor with a source coupled to the supply terminal and with a gate coupled so as to receive a reference voltage; a first cascode circuit with a first main current electrode coupled to a drain of the first field effect transistor, with a second main current electrode coupled to a gate of the first field effect transistor and to the first output terminal, and with a control electrode; a second cascode circuit with a first main current electrode coupled to a drain of the second field effect transistor and to the drain of the first field effect transistor, with a second main current electrode coupled to a gate of the second field effect transistor and to the second output terminal, and with a control electrode coupled to the control electrode of the first cascode circuit; a third cascode circuit with a first main current electrode coupled to a drain of the third field effect transistor, with a second main current electrode coupled to the control electrode of the first cascode circuit, and with a control electrode coupled to the control electrode of the first cascode circuit; and current means for providing a current through the third field effect transistor and the third cascode circuit.
Such an electronic circuit is known from the prior art. The known electronic circuit is shown in FIG. 1 and comprises: first to third field effect transistors (T1 to T3), fifth to seventh cascode field effect transistors (T5 to T7), and a current source I for supplying a current through the third and the seventh field effect transistor T3 and T7. The electronic circuit receives a supply voltage between a first supply terminal VSS and a second supply terminal VDD.
FIG. 1 also shows a model of a differential output of an amplifier stage AMPSTG, which differential output comprises a first output terminal 1 and a second output terminal 2. The sources of the first to third transistors T1 to T3 are connected to the first supply terminal VSS. The drains of the first and second transistors T1 and T2 and the sources of the fifth and sixth transistors T5 and T6 are interconnected. The gate of the first transistor T1 and the drain of the fifth transistor T5 are connected to the first output terminal 1. The gate of the second transistor T2 and the drain of the sixth transistor T6 are connected to the second output terminal 2. The gates of the fifth, sixth, and seventh transistors T5 to T7 and the drain of the seventh transistor T7 are interconnected. The drain of the third transistor T3 is connected to the source of the seventh transistor T7. The gate of the third transistor T3 receives a reference voltage VCM. The voltages at the output terminals 1 and 2 are referenced Vout1 and Vout2, respectively. The common mode voltage at the output terminals 1 and 2 per definition then is equal to the sum of Vout1 and Vout2 divided by 2. The electronic circuit is dimensioned such that the common mode voltage is equal to the reference voltage VCM. This is represented in equation 1                                                         V              out1                        +                          V              out2                                2                =                  V          CM                                    (        1        )            
It should be noted that the first and the second transistor must always be set for their linear operation ranges if the electronic circuit is to operate correctly. In the known electronic circuit, the reference voltage VCM, and accordingly also the common mode voltage at the first and the second output terminal 1 and 2, is usually chosen to be approximately equal to half the supply voltage. The reference voltage VCM is often greater than necessary then, but a sufficient margin is present for accommodating, for example, spreads in transistor parameters.
It is a disadvantage of the known electronic circuit, accordingly, that it is less suitable for applications in which an operation at a minimum supply voltage is desired.
It is an object of the invention to provide an electronic circuit capable of supplying a lowest possible common mode voltage to a differential output of an amplifier stage.
According to the invention, the electronic circuit mentioned in the opening paragraph is for this purpose characterized in that the electronic circuit further comprises: a fourth field effect transistor with a source coupled to the first supply terminal; a fourth cascode circuit with a first main current electrode coupled to a drain of the fourth field effect transistor, with a second main current electrode coupled to a gate of the fourth field effect transistor, and with a control electrode coupled to the control electrode of the first cascode circuit; further current means for supplying a current through the fourth field effect transistor and the fourth cascode circuit; and voltage-generating means coupled in series between the further current means and the second main current electrode of the fourth cascode circuit, and in that the gate of the third field effect transistor is coupled to the voltage-generating means for receiving the reference voltage, and in that the first, the second, and the third field effect transistor are dimensioned such that they have approximately the same current densities, and in that the fourth field effect transistor is dimensioned such that it has a current density which is a factor N smaller than said current densities, said factor N being approximately equal to the ratio of the nominal current to the minimum current through the first field effect transistor.
It is achieved thereby that the reference voltage to be defined is substantially independent of transistor parameters.
An embodiment of an electronic circuit according to the invention is characterized in that the first cascode circuit comprises a fifth transistor with a first and a second main current electrode which form the first and the second main current electrode, respectively, of the first cascode circuit, and with a control electrode which forms the control electrode of the first cascode circuit; and in that the second cascode circuit comprises a sixth transistor with a first and a second main current electrode which form the first and the second main current electrode, respectively, of the second cascode circuit, and with a control electrode which forms the control electrode of the second cascode circuit; and in that the third cascode circuit comprises a seventh transistor with a first and a second main current electrode which form the first and the second main current electrode, respectively, of the third cascode circuit, and with a control electrode which forms the control electrode of the third cascode circuit; and in that the fourth cascode circuit comprises an eighth transistor with a first and a second main electrode which form the first and the second main current electrode, respectively, of the fourth cascode circuit, and with a control electrode which forms the control electrode of the fourth cascode circuit.
A very simple embodiment for the cascode circuits is obtained thereby. The fifth to seventh transistors are either all implemented with bipolar transistors of the same conductivity type or all implemented with field effect transistors of the same conductivity type.
An embodiment of an electronic circuit according to the invention is furthermore characterized in that the fifth, the sixth, the seventh, and the eighth transistor are dimensioned such that they have approximately the same current densities.
As a result, the potentials at the drains of the first to fourth field effect transistors are approximately equal. This achieves a better accuracy for defining the common mode voltage at the first and the second output terminal 1 and 2.
Further advantageous embodiments of the electronic circuit according to the invention are defined in claims 4 to 8. It should be noted in this connection that the presence of the limiting means prevents the first or second field effect transistor from being fully switched off in the case of a too high differential output voltage at the differential output of the amplifier stage. A full switch-off of the first or second field effect transistor may lead to an unacceptably long recovery time in the known electronic circuit.